Reported by Nikolaus Schaller, Oct 26, 2015
OMAP5 DSI (MIPI) interface does not honour the Tearing Input (VSYNC) in "Video Mode". Rather, the VSYNC frequency and phase is defined by the DISPC settings. The SSD2858 has its own VSYNC and frame timing generator and drives the panel autonomously. Tearing appears since the VSYNC of the DISPC and VSYNC of the SSD2858 are not synchronized and may even have slightly different frequencies (clock oscillators are separate and have drift and divider factors can not be found to give an exact match). Anti-Tearing should work as follows: * enable TE-input of OMAP5 DSI as gpio interrupt * make SSD output VSYNC to the TE-input * detect the timing relationship between the DISPC VSYNC irq and the TE-input irq * if they are close enough, do nothing * if they are too far away, adjust the vertical blanking period of the DISPC * this may need some cycles to lock, but if locked the phase should be stable Start with implementing into panel-mipi-debug driver.
Comment 1 by Nikolaus Schaller, Apr 22, 2016
Comment 2 by Nikolaus Schaller, Oct 29, 2016
Final Pyra will be using TILER and no SSD2858 so this is no more a problem.
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