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I2C peripheral
I2C
Normally, I2C is used for communicating with various peripherals, and since the Power management, RTC and Audio involves communicating with an I2C peripheral, it is likely that support is needed to make that work on the Letux 400.
The device clock for I2C is the pclock or PCLK. See Clocks for details.
I2C Registers
Register | Offset | Purpose |
---|---|---|
DR | 0x00 | Data |
CR | 0x04 | Control |
SR | 0x08 | Status |
GR | 0x0c | Clock generator |
DR
The data register (DR) is arranged as follows:
Bits | Purpose |
---|---|
7..0 | Data |
CR
The control register (CR) is arranged as follows:
Bits | Purpose |
---|---|
7..5 | (Reserved) |
4 | Interrupt enable |
3 | Start |
2 | Stop |
1 | Acknowledge |
0 | Enable |
SR
The status register (SR) is arranged as follows:
Bits | Purpose |
---|---|
7..5 | (Reserved) |
4 | FIFO buffer not empty |
3 | Bus busy |
2 | Transaction end |
1 | Data receive failure |
0 | Acknowledgement failure |
GR
The clock generator register (GR) is arranged as follows:
Bits | Purpose |
---|---|
15..0 | Clock divider (encoded) |
Apparently, the appropriate formula is...
I2C frequency = Device clock frequency / (Clock divider * 16)
Thus...
Clock divider = Device clock frequency / (I2C frequency * 16)
The GR field is populated with an encoded value of the divider minus one, with zero therefore encoding a divider of one.
Thus, to use an I2C frequency of 400kHz, the following calculation would be used:
Clock divider = Device clock frequency / (400000 * 16)
To attain the appropriate I2C frequency, the device clock (pclock, PCLK) needs to be configured appropriately, multiplying the input clock if necessary.
Resources
In modern kernels, the following files are pertinent:
- drivers/i2c/busses/i2c-jz4730.c