Table of Content
Ingenic JZ4730 SoC
http://system-on-a-chip.findthedata.org/l/108/Ingenic-Jz4730
CENTRAL PROCESSING UNIT
- CPU Clock Speed 336 MHZ
- CPU Cores 1
- CORE(S)
- Primary CPU MIPS XBurst L1 Instruction Cache 16 KB/Core L1 Data Cache 16 KB/Core Word Length 32 bit
Performance
The Ingenic Jz4730 has a low performing CPU with a maximum clock speed of 336 MHz. It has 1 core(s), resulting in fair to middling multi-tasking when compared to most dual core processors. This processor is based on the Reduced Instruction Set Computing (RISC) design strategy enabling instructions to execute faster, as opposed to the Complex Instruction Set Computing (CISC) design strategy, which is generally slower at executing due to lengthy instructions.
EXTERNAL COMPONENTS
External Component Interfaces
- LCD Controller
- Primary Camera Support 4 MP
ADDITIONAL INFORMATION
Additional Features
- AHB bus
- SDRAM controller
- NAND flash controller
- 8 ch. DMC
- Multimedia accelerator
- MMC/SD/SDIO controller
- smart card controller
- 802.3 compliant Ethernet interface
- PC card interface ( PCMCIA, CompactFlash)
- Feature Size 180 nm
Some Datasheets
http://download.goldelico.com/letux-400/files/