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Details of the MMC peripheral
MMC
The JZ4730 has a memory card (MMC) peripheral that appears to be very close, if not identical, to that used in the JZ4740 and other SoCs of that generation. (The JZ4780 and its generation appear to offer various enhancements.)
The base location of the peripheral is at 0x10021000 in physical memory. In various manuals and headers, it is typically referred to as MSC (MMC/SD Controller). The registers appearing at/from this location are as follows:
| Register | Offset | Purpose |
|---|---|---|
| STRPCL | 0x000 | Start/stop control |
| STAT | 0x004 | Status |
| CLKRT | 0x008 | Clock rate |
| CMDAT | 0x00C | Command and data control |
| RESTO | 0x010 | Response timeout |
| RDTO | 0x014 | Read timeout |
| BLKLEN | 0x018 | Block length |
| NOB | 0x01C | Number of blocks |
| SNOB | 0x020 | Successfully-transferred number of blocks |
| IMASK | 0x024 | Interrupt mask |
| IREG | 0x028 | Interrupt status |
| CMD | 0x02C | Command index |
| ARG | 0x030 | Command argument |
| RES | 0x034 | Response FIFO |
| RXFIFO | 0x038 | Receive data FIFO |
| TXFIFO | 0x03C | Transmit data FIFO |
STRPCL
| Bit | Field | Purpose |
|---|---|---|
| 15..8 | (Reserved) | |
| 7 | EXIT_MULTIPLE | Multi-block transfer termination |
| 6 | EXIT_TRANSFER | SD suspend; MMC terminate stream read |
| 5 | START_READWAIT | Start SDIO ReadWait |
| 4 | STOP_READWAIT | Stop SDIO ReadWait |
| 3 | RESET | Reset controller |
| 2 | START_OP | Start new operation |
| 1..0 | CLOCK_CONTROL | Stop MMC clock (01), start MMC clock (10) |
Operations
Starting an operation involves setting START_OP and CLOCK_CONTROL to start MMC clock (10).
DMA Usage
To use the DMA peripheral to transfer data via the MMC peripheral, the following DMA registers are used:
DTC is set to the number of transfer units (total size divided by transfer data size)
DCCSR is configured with...
- source (SWDH) and destination (DWDH) port widths of 32 bits
- a transfer data size (DS) of 32 bytes
- single transfer mode (TM)
- request interval detection length (RDIL) of 0